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SPI
Last modified: Tuesday, August 02, 2005
(1)Short for Serial Peripheral
Interface, a
full-duplexsynchronousserial interface
for connecting low-/medium-bandwidth
external devices using four wires. SPI devices communicate using a
master/slave
relationship over two data lines and two control lines:
Master Out Slave In (MOSI): supplies the output data from the master to
the inputs of the slaves.
Master In Slave Out (MISO): supplies the output data from a slave to
the input of the master. It is important to note that there can be no more
than one slave that is transmitting data during any particular transfer.
Serial Clock (SCLK): a control line driven by the master, regulating
the flow of data bits.
Slave Select (SS): a control line that allows slaves to be turned on
and off with
hardware control.
(2) Short for System Packet Interface, a
point-to-point interface standard, allows network equipment designers to develop
an array of next-generation multi-service switches and routers to support
multi-service traffic with aggregate bandwidths up to OC-192 (10 Gb/s) and
beyond, enabling them to dramatically increase system performance. It is a
family of Interoperability Agreements from the Optical Internetworking Forum (OIF)
which include:
System Packet Interface Level 5 (SPI-5): OC-768 System Interface
for Physical and Link Layer Devices. (OIF
documentation)
System Packet Interface Level 4 (SPI-4) Phase 2: OC-192 System
Interface for Physical and Link Layer Devices.(OIF documentation)
System Physical Interface Level 4 (SPI-4) Phase 1: A System
Interface for Interconnection Between Physical and Link Layer, or
Peer-to-Peer Entities Operating at an OC-192 Rate (10 Gb/s) (OIF
documentation)
System Packet Interface Level 3: OC-48 System Interface for
Physical and Link Layer Devices (OIF
documentation)
